Overview
Every VirtuChip.AI course package includes a simulink/ folder with Simulink masked
blocks (.slx) for behavioural system-level simulation. These complement the transistor-level SPICE
models for top-down verification.
Adding the library to Simulink
Run addpath(genpath('~/virtuchip/AnalogIC/simulink')) in the MATLAB console,
then call virtuchip_init to register the block library. The VirtuChip.AI
library tab will appear in the Simulink Library Browser.
Building a sigma-delta ADC testbench
Drag the SigmaDelta_1st block into a new model. Connect a sine source at 1 kHz, set OSR to 64, and run a 10 ms simulation. Use the Spectrum Analyser block to view SNR directly. Expected SNR for a 1st-order modulator at OSR 64: ≈ 50 dB.
Co-simulation with Spectre
For mixed-level simulation, use the AMS co-simulation bridge. The MATLAB script
run_cosim.m in the package automates netlisting and handshaking between
Simulink and Spectre.